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发明名称
THE METHOD FOR MANUFACTURING MEASURABLE VIA TEST PATTERNS AND CHARACTERIZATION OF VIA IN MULTI-LAYERED IC PACKAGE
摘要
申请公布号
KR101111444(B1)
申请公布日期
2012.02.24
申请号
KR20090099769
申请日期
2009.10.20
申请人
发明人
分类号
H01L21/66
主分类号
H01L21/66
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代理人
主权项
地址
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