DRAM for write and read-out of data

摘要

The data are written and read-out of physical addresses of a memory cell field (5), corresp. to logic addresses. The DRAM comprises a test mode setting members (12) and a data shifting circuit for executing the test mode after its setting. The shifting is carried out by selective reversal of data values, which have been applied externally via input/output DRAM terminal pins according to physical addresses, corresp. to the logic ones. The reversed data are again reversed during the data read-out from the memory cell field, based on corresp. information of the physical addresses.