发明名称 Performance-aware logic operations for generating masks
摘要 A method for forming masks for manufacturing a circuit includes providing a design of the circuit, wherein the circuit comprises a device; performing a first logic operation to determine a first region for forming a first feature of the device; and performing a second logic operation to expand the first feature to a second region greater than the first region. The pattern of the second region may be used to form the masks.
申请公布号 US8122394(B2) 申请公布日期 2012.02.21
申请号 US20080212088 申请日期 2008.09.17
申请人 LU LEE-CHUNG;LIN CHUNG-TE;WANG YEN-SEN;CHUANG YAO-JEN;CHANG GWAN SIN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LU LEE-CHUNG;LIN CHUNG-TE;WANG YEN-SEN;CHUANG YAO-JEN;CHANG GWAN SIN
分类号 G06F17/50;G06F7/66;G06K9/00;H01L21/66 主分类号 G06F17/50
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