发明名称 SEMICONDUCTOR TESTING APPARATUS AND SEMICONDUCTOR TESTING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To ensure accuracy of a test simultaneously with the reduction of a testing time even when performing a test on the basis of a test program having a branching instruction or a parameter designating instruction. <P>SOLUTION: A semiconductor testing apparatus 1 including a tester controller 2 for controlling one or more PE cards 3 for testing a DUT includes a command issuing section 12 and a control register 21. The command issuing section 12 is provided in the tester controller 2, issues commands sequentially on the basis of a test program 13 for performing the test, outputs the commands to the PE cards 3, stops issuing commands until a branch condition is determined when a branching instruction is read out, and stops issuing commands until the value of a parameter is determined when a parameter designating instruction is read out. The control register 21 is provided in the PE card 3 and stores setting value data therein for executing the test on the basis of commands inputted sequentially. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012032326(A) 申请公布日期 2012.02.16
申请号 JP20100173577 申请日期 2010.08.02
申请人 YOKOGAWA ELECTRIC CORP 发明人 ETO TOMOAKI;TADA SATORU
分类号 G01R31/28 主分类号 G01R31/28
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