| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method with which it becomes possible to suppress variations in polishing performed with a CMP method. <P>SOLUTION: A dummy pattern 41 is formed in a third interlayer insulation film in a peripheral region 2 of a wafer 1. The dummy pattern 41 comprises: an inclination pattern 42, which intersects a tangent line and a normal line of the wafer 1; and a separation pattern 43 that is connected to the inclination pattern 42 and extends in a circumferential direction of the wafer 1. After a conductive material has been embedded in a wiring groove, when an excess portion of the conductive material is removed with a CMP method, a polishing agent is dispersed through a groove formed by the dummy pattern 41, so that polishing amounts of the conductive material and the third interlayer insulation film become uniform. <P>COPYRIGHT: (C)2012,JPO&INPIT |
