发明名称 THREE-DIMENSIONAL ARRAY OF RE-PROGRAMMABLE NONVOLATILE MEMORY ELEMENTS HAVING VERTICAL BIT LINES AND A SINGLE-SIDED WORD LINE ARCHITECTURE
摘要 A three-dimensional array especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. A single-sided word line architecture provides a word line exclusively for each row of memory elements instead of sharing one word line between two rows of memory elements thereby avoids linking the memory element across the array across the word lines. While the row of memory elements is also being accessed by a corresponding row of local bit lines, there is no extension of coupling between adjacent rows of local bit lines and therefore leakage currents beyond the word line.
申请公布号 KR20120013971(A) 申请公布日期 2012.02.15
申请号 KR20117026212 申请日期 2010.04.02
申请人 SANDISK 3D LLC 发明人 SAMACHISA GEORGE;YAN TIANHONG
分类号 G11C8/14;G11C7/18;G11C16/02 主分类号 G11C8/14
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