发明名称 DISPOSITIF DE CONTROLE DE L'ACTIVITE DE MODULES D'UN RESEAU DE MODULES DE MEMOIRE
摘要 <p>A memory device includes an array of memory modules, a global controller, and a local controller for each memory module in the array of memory modules being configured to deliver to the global controller an activity signal reflecting an activity of the respective memory module. The memory device includes a circuit configured to implement a NAND logic function based upon the activity signals and to output a control signal to the global controller based upon the NAND logic function.</p>
申请公布号 FR2938670(B1) 申请公布日期 2012.02.10
申请号 FR20080057807 申请日期 2008.11.17
申请人 STMICROELECTRONICS (CROLLES) SAS;STMICROELECTRONICS ROUSSET SAS 发明人 LACHAUD CLAIRE MARIE;GONCALVES CHRISTOPHE
分类号 G06F12/00;G11C5/14 主分类号 G06F12/00
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