发明名称 OVERRIDABLE ELEMENTS IN RECONFIGURABLE LOGIC DEVICES
摘要 <p>A method and system for configuring an area of a reconfigurable array of logic units in order to avoid inverting feedback loops during testing using an Automatic Test Pattern Generation (ATPG) tool. The method comprises the steps of identifying all inverting and potentially-inverting logic units in the area and grouping each inverting logic unit and potentially-inverting logic unit into at least one chain comprising inverting logic units and/or appropriately-configured potentially-inverting logic units, which chains form non-inverting paths through the area. The method also comprises the step of overriding the reconfigurable area to implement the chains and the appropriate configurations of the potentially-inverting logic units during testing.</p>
申请公布号 WO2012016597(A1) 申请公布日期 2012.02.09
申请号 WO2010EP61454 申请日期 2010.08.05
申请人 PANASONIC CORPORATION;HANDA, AKOS;PRICE, NEIL 发明人 HANDA, AKOS;PRICE, NEIL
分类号 G01R31/3185 主分类号 G01R31/3185
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