发明名称 |
PROCESS FOR THROUGH SILICON VIA FILLING |
摘要 |
A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon via may be more than about 3 micrometers in diameter and more that about 20 micrometers deep. High copper concentration and low acidity electroplating solution is used for deposition copper into the through silicon vias. |
申请公布号 |
US2012031768(A1) |
申请公布日期 |
2012.02.09 |
申请号 |
US201113270897 |
申请日期 |
2011.10.11 |
申请人 |
REID JONATHAN D.;WANG KATIE QUN;WILEY MARK J. |
发明人 |
REID JONATHAN D.;WANG KATIE QUN;WILEY MARK J. |
分类号 |
C25D5/02;C25D7/12 |
主分类号 |
C25D5/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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