发明名称 MASK SET
摘要 <P>PROBLEM TO BE SOLVED: To improve dimensional accuracy of a wiring pattern when a prescribed wiring pattern is formed on a substrate using a metal mask set that includes a first metal mask and a second metal mask. <P>SOLUTION: For example, a metal mask set 100 including a plurality of metal masks used when a prescribed wiring pattern is formed on a semiconductor substrate 102 includes: a first metal mask 110 (mask for chip 320) with an opening 340 the form of which corresponds to a partial region of the wiring pattern; and a second metal mask 120 (mask for chip 330) with an opening 350 the form of which corresponds to another partial region of the wiring pattern, and with a space 360 having the form to cover the opening 340 of the first metal mask 110. A first metal and a second metal are sequentially formed on the substrate through the first metal mask 110 and the second metal mask 120 that are sequentially formed on the semiconductor substrate 102 so that the wiring pattern is formed on the substrate. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012022941(A) 申请公布日期 2012.02.02
申请号 JP20100161107 申请日期 2010.07.15
申请人 SK LINK:KK 发明人 NIIMA YASUHIRO;OTSUKA KANJI
分类号 H05B33/10;C23C14/04;H01L51/50 主分类号 H05B33/10
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