发明名称 PROCESS TO FORM VIA HOLE IN SEMICONDUCTOR WAFER
摘要 A process to form a via hole in a semiconductor wafer is disclosed. The process includes steps of, preparing a metal mask and etching the wafer by the metal mask as the etching mask. The preparation of the metal mask includes steps of: coating a nega-resist on the back surface of the wafer, carrying out the photolithography for the coated nega-resist, plating a metal selectively by the patterned photoresist, and removing the patterned photoresist.
申请公布号 US2012028465(A1) 申请公布日期 2012.02.02
申请号 US201113188569 申请日期 2011.07.22
申请人 KOSAKA TOSHIYUKI;SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC. 发明人 KOSAKA TOSHIYUKI
分类号 H01L21/768 主分类号 H01L21/768
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