发明名称 DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
摘要 <p>A data processing apparatus includes an address bus, a scramble unit, and a data bus. The address bus outputs address data to be given to a memory apparatus. The scramble unit scrambles write-in data into a storage position in the memory apparatus identified by the address data to obtain confidential data. The data bus outputs the confidential data. The scramble unit includes a first scramble unit, a first conversion unit and a second scramble unit. The first scramble unit XORs first mask data corresponding to the address data and the write-in data for each bit and makes it first scrambled data. The first conversion unit performs one-to-one substitution conversion of the first scrambled data. The second scramble unit XORs second mask data corresponding to the address data and data after the conversion of the first scrambled data by the first conversion unit and outputs obtained second scrambled data as the confidential data.</p>
申请公布号 EP2413305(A1) 申请公布日期 2012.02.01
申请号 EP20090842134 申请日期 2009.03.23
申请人 FUJITSU LIMITED 发明人 FURUKAWA, KAZUYOSHI;SHIMOYAMA, TAKESHI;TAKENAKA, MASAHIKO
分类号 G09C1/00;H04L9/06 主分类号 G09C1/00
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