| 摘要 |
A method for fabricating flash memory devices, e.g., NAND, NOR, is provided. The method includes providing a semiconductor substrate. The method includes forming a second polysilicon layer overlying a plurality of floating gate structures to cause formation of an upper surface provided on the second polysilicon layer. The upper surface has a first recessed region and a second recessed region. The method includes depositing a dielectric material overlying the upper surface to fill the first recessed region and the second recessed region to form a second upper surface region and cover a first elevated region, a second elevated region, and a third elevated region. The method forms at least one dielectric spacer within the first recessed region and at least one dielectric spacer within the second recessed region to form a resulting surface region, and subjects the resulting surface region to a chemical mechanical polishing process to cause formation of a substantially planarized second polysilicon layer free from the dielectric material. |
