发明名称 PROCESSOR MICRO-ARCHITECTURE FOR COMPUTE, SAVE OR RESTORE MULTIPLE REGISTERS, DEVICES, SYSTEMS, METHODS AND PROCESSES OF MANUFACTURE
摘要 An electronic circuit (4000) includes a bias value generator circuit (3900) operable to supply a varying bias value in a programmable range, and an instruction circuit (3625, 4010) responsive to a first instruction to program the range of said bias value generator circuit (3900) and further responsive to a second instruction having an operand to repeatedly issue said second instruction with said operand varied in an operand value range determined as a function of the varying bias value.
申请公布号 US2012023313(A1) 申请公布日期 2012.01.26
申请号 US201113247101 申请日期 2011.09.28
申请人 TASHIRO KENICHI;MIZUNO HIROYUKI;UMEMOTO YUJI;TEXAS INSTRUMENTS INCORPORATED 发明人 TASHIRO KENICHI;MIZUNO HIROYUKI;UMEMOTO YUJI
分类号 G06F9/30;G06F9/302 主分类号 G06F9/30
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