| 摘要 |
<p>The invention relates to a CMOS circuit in low-voltage implementation, low power-consumption implementation, high-speed implementation, or small-size implementation. In a circuit (INV) which uses a FD-SOI MOST where a back gate (20) is controlled by a well (25), voltage amplitude at the well (25) is made larger than input-voltage amplitude at the gate (20). Alternatively, the circuit is modified into a circuit which uses a MOST that changes dynamically into an enhancement mode and a depletion mode.</p> |
