发明名称 METHOD OF MANUFACTURING SELF-ALIGNING WAFER OR CHIP STRUCTURE
摘要 <P>PROBLEM TO BE SOLVED: To provide a self-aligning wafer or a chip structure equipped with a substrate, at least one first recessed base portion, at least one second recessed base portion, at least one connecting structure, and at least one bump. <P>SOLUTION: A substrate 100 has a first surface 101a and a second surface 101b, and at least one pad 102 is formed on the first surface 101a. A first recessed base portion 116 is disposed on the first surface 101a, and electrically connected to the pad 102. A second recessed base portion 120 is disposed on the second surface 101b. A connecting structure penetrates the substrate 100 so as to be electrically connected to the first and second recessed base portions 116 and 120, and is disposed between the first and second recessed base portions 116 and 120. A bump 122 is filled in the second recessed base portion 120, and projects out from the second surface 101b. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012015551(A) 申请公布日期 2012.01.19
申请号 JP20110221320 申请日期 2011.10.05
申请人 IND TECHNOL RES INST 发明人 CHEN JUNG-TAI;HO TZONG-CHE;CHU JUN-HUN
分类号 H01L25/065;H01L21/3205;H01L23/12;H01L23/52;H01L25/07;H01L25/18 主分类号 H01L25/065
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