发明名称 Memory element comprising a fuse in parallel with an anti-fuse
摘要 Embodiments extend the capability of fuse elements, anti-fuse elements, and combinations thereof to enable multi-time programmable memory elements. Accordingly, embodiments significantly reduce area requirements and control circuitry complexity of memory elements. Embodiments can be used in non-volatile memory storage, for example, and are suitable for use in system on chip (SoC) products. A memory element is provided and comprises a first terminal (N1) coupled to an N-doped region and a second terminal (N2) coupled to a P-doped region. The N-doped and P-doped regions form a polysilicon diode anti-fuse. A silicide layer connects the doped regions and forms a fuse in parallel with the anti-fuse.
申请公布号 EP2408001(A2) 申请公布日期 2012.01.18
申请号 EP20110005601 申请日期 2011.07.07
申请人 BROADCOM CORPORATION 发明人 BUER, MYRON
分类号 H01L21/02;G11C17/00;G11C17/14;H01L27/10;H01L27/102;H01L29/861 主分类号 H01L21/02
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