发明名称 |
Urgency and time window manipulation to accommodate unpredictable memory operations |
摘要 |
The variable latency associated with flash memory due to background data integrity operations is managed in order to allow the flash memory to be used in isochronous systems. A system processor is notified regularly of the nature and urgency of requests for time to ensure data integrity. Minimal interruptions of system processing are achieved and operation is ensured in the event of a power interruption. |
申请公布号 |
US8099632(B2) |
申请公布日期 |
2012.01.17 |
申请号 |
US20070864740 |
申请日期 |
2007.09.28 |
申请人 |
TRINGALI J. JAMES;GOROBETS SERGEY A.;TRAISTER SHAI;ATAKLTI YOSIEF;SANDISK TECHNOLOGIES INC. |
发明人 |
TRINGALI J. JAMES;GOROBETS SERGEY A.;TRAISTER SHAI;ATAKLTI YOSIEF |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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