发明名称
摘要 <p>The delay circuit (100) has delaying elements (10-1,10-2), which delays an input signal at a delaying value and an initialization circuit (20) measures a delaying value. The initialization circuit has a sliding path, which supplies an output signal of the former delaying element and a measuring circuit (26-1) sets sequential delay setting value. Another measuring circuit (26-2) measures a delaying value in the latter delaying element. A delay value evaluation circuit (28) corrects each of the delaying values measured from the former measuring circuit. Independent claims are also included for the following: (1) a test equipment for testing a device (2) a recording medium (3) a semi conductor chip (4) an initialization method (5) an initialization circuit.</p>
申请公布号 JP4849996(B2) 申请公布日期 2012.01.11
申请号 JP20060226478 申请日期 2006.08.23
申请人 发明人
分类号 G01R31/28;H01L21/822;H01L27/04;H03K5/14 主分类号 G01R31/28
代理机构 代理人
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