| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device with low on-voltage and low gate capacitance, capable of preventing reduction in breakdown voltage and lowering cost, and to provide a method of manufacturing the same. <P>SOLUTION: P-well regions 3 and n<SP POS="POST">+</SP>source regions 4 are selectively provided in a surface layer of an n<SP POS="POST">-</SP>drift region 2. Trenches 6 that contact the n<SP POS="POST">+</SP>source region 4, and penetrate the p-well regions 3 to reach the n<SP POS="POST">-</SP>drift region 2 are provided. In each trench 6, a field plate 8 is provided via a first insulating film 7. Additionally, in the trench 6, a gate electrode 10 is provided over the field plate 8 via a second insulating layer 9. The first insulating film 7 has a thickness equal to or larger than that of the second insulating layer 9. In the n<SP POS="POST">-</SP>drift region 2, n<SP POS="POST">--</SP>low concentration regions 21 covering the bottoms of the trenches 6 across from the corners to the bottoms of the trenches 6 are provided. <P>COPYRIGHT: (C)2012,JPO&INPIT |
