发明名称 Wiring information generating apparatus, method and program
摘要 A wiring information generating apparatus includes an input unit that inputs a wiring layer number indicating a wiring layer, a via layer number indicating a next via layer to connect the wiring layer, and spacing information based on wiring rules. A storage unit stores a terminal figure table providing terminal figures, a logic element device wire protected area table, and a wire protected area table. A wire protected area creation unit adds an area of a terminal figure and a logic element device wire protected area obtained by searching the terminal figure table and the logic element device wire protected area table based on the input wiring layer number and/or via layer number and acquires wire layer-via layer spacing information. A wiring information generating unit generates wiring information in the wiring layer based on connection information and arrangement information of the semiconductor logic circuit, and wire protected area information.
申请公布号 US8079010(B2) 申请公布日期 2011.12.13
申请号 US20090559837 申请日期 2009.09.15
申请人 ISOMURA TOMOYUKI;FUJITSU LIMITED 发明人 ISOMURA TOMOYUKI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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