发明名称 Multi-chip package with a plurality of chip pads arranged in an array
摘要 A circuit structure of a package carrier including a plurality of chip pads, a first electrode, a second electrode, a third electrode and a fourth electrode is provided. These chip pads are arranged in an M×N array. A first bonding pad, a second bonding pad, a third bonding pad and a fourth bonding pad are disposed clockwise in the peripheral area of each chip pad in sequence. The orientations of each of the first, second, third, and fourth bonding pads of the (S−1)th row rotated by 90 degrees are equal to the orientations of each of the first, second, third and fourth bonding pads of the Sth row, respectively. The first electrode is connected with each first bonding pad. The second electrode is connected with each second bonding pad. The third electrode is connected with each third bonding pad. The fourth electrode is connected with each fourth bonding pad.
申请公布号 US8071989(B2) 申请公布日期 2011.12.06
申请号 US20090621529 申请日期 2009.11.19
申请人 CHAO TZU-HAO;EVERLIGHT ELECTRONICS CO., LTD. 发明人 CHAO TZU-HAO
分类号 H01L29/205 主分类号 H01L29/205
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