发明名称
摘要 An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., −400 to −600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
申请公布号 JP4828585(B2) 申请公布日期 2011.11.30
申请号 JP20080209965 申请日期 2008.08.18
申请人 发明人
分类号 H01L21/3065;H01J37/32;H01L21/683;H05H1/46 主分类号 H01L21/3065
代理机构 代理人
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