发明名称 |
METHOD OF OPTIMIZING STANDBY MANAGEMENT OF A MICROPROCESSOR ALLOWING IMPLEMENTATION OF SEVERAL LOGIC CORES AND COMPUTER PROGRAM IMPLEMENTING SUCH A METHOD |
摘要 |
The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource common to said at least two logic cores on standby. After having determined (400) a desired standby state for each of said at least two logic cores, said desired standby state of one of said at least two logic cores is compared with the said desired standby state of the other of said at least two logic cores. In response to said comparison, instructions preparing for said placement on standby and/or allowing the restoration of said one of said at least two logic cores are launched (420). |
申请公布号 |
WO2011144847(A1) |
申请公布日期 |
2011.11.24 |
申请号 |
WO2011FR51079 |
申请日期 |
2011.05.13 |
申请人 |
BULL SAS;BRU, XAVIER;WELLENREITER, FRANCOIS;WELTERLEN, BENOIT |
发明人 |
BRU, XAVIER;WELLENREITER, FRANCOIS;WELTERLEN, BENOIT |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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