| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a switched capacitor gain stage that can reduce a settling time without increasing an output current, and provide a pipelined analog-to-digital (A/D) converter having the switched capacitor gain stages. <P>SOLUTION: The switched capacitor gain stage samples an input voltage Vin with sample-and-hold circuits (capacitors Cf and Cs as well as switches SWa to SWc) in a first phase, and then amplifies and outputs a sampled input voltage with amplifiers (AMP1 and AMP2) in a second phase. The switched capacitor gain stage includes a Miller compensation circuit (Cm and SWg) that performs Miller compensation for the amplifiers only when sampling operation of the input voltage Vin is performed. <P>COPYRIGHT: (C)2012,JPO&INPIT |
