发明名称 STRUCTURE OF SUPERLATTICE BANDGAP ENGINEERED CAPACITORLESS DRAM CELL TRANSISTOR
摘要 PURPOSE: An SBE EDRAM cell transistor which does not have a capacitor is provided to improve a charge holding characteristic by shutting a hole using band offset between a silicon germanium layer and a silicon layer. CONSTITUTION: A silicon dioxide obstacle(100) secludes that a hole which is created by impact ionization gets out. A pair of silicon source-drain layers(200) is formed in the upper end of the silicon dioxide obstacle. A silicon channel layer(300) is formed in order to be contiguous between a pair of silicon source-drain layers. A silicon germanium layer(400) is heterogeneously united in the bottom end of the silicon channel layer and stores the hole which is created by the impact ionization.
申请公布号 KR20110126004(A) 申请公布日期 2011.11.22
申请号 KR20100045681 申请日期 2010.05.14
申请人 KOOKMIN UNIVERSITY INDUSTRY ACADEMY COOPERATION FOUNDATION 发明人 KIM, DONG MYONG;KIM, DEA HWAN;LEE, SUN YEONG;JANG, JAE MAN;KIM, HYO JONG;SHIN, JA SUN
分类号 H01L27/108;H01L21/8242 主分类号 H01L27/108
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