发明名称 GPSTP with enhanced aggregation functionality
摘要 A general purpose set theoretic processor is enhanced 1) by providing multi-function counters in stead of down-counters, 2) by internalizing the composite Boolean Logic function by introducing a two stage (two matrix) programmable composite Boolean Logic functionality wherein the first stage yields logical products of selected aggregation logic responses (or their complements) and the second stage yields logical sums of selected sets of those logical products, and 3) by providing internal selective re-initialization by means of a re-initialization routing matrix functionality that directs logical sums of Composite Boolean Logic sums of products to selected GPSTP cells to be re-initialized.
申请公布号 US8065249(B1) 申请公布日期 2011.11.22
申请号 US20070871885 申请日期 2007.10.12
申请人 HARRIS CURTIS L.;BURKHARD JAMES H. 发明人 HARRIS CURTIS L.;BURKHARD JAMES H.
分类号 G06F17/00;G06N5/00 主分类号 G06F17/00
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