发明名称 BUFFER CIRCUIT
摘要 PURPOSE: A buffer circuit is provided to simplify a manufacturing process by constituting the buffer circuit having a high slew rate as a transistor of mono-polarity and to reduce an area in which the buffer circuit occupies. CONSTITUTION: The first terminal and the third terminal of a first transistor(101) are connected to a power line of high-side. A second terminal of the first transistor is connected to the first terminal of a second transistor(102) and the third terminal of a 3rd transistor(103). A third terminal of the second transistor is connected to the input unit of a buffer circuit(100). A second terminal of the 3rd transistor is connected to the first terminal of a fourth transistor(104) and the third terminal of a fifth transistor(105). A second terminal of the fifth transistor is connected to the first terminal of a sixth transistor(106) and an output unit of the buffer circuit. The second terminal of the first transistor is connected to the output unit through a capacitive element(107).
申请公布号 KR20110125597(A) 申请公布日期 2011.11.21
申请号 KR20110044399 申请日期 2011.05.12
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 ITO YOSHIAKI
分类号 H03K19/0175;H03K17/16;H03K17/687 主分类号 H03K19/0175
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