发明名称 LAYOUT METHOD, LAYOUT SYSTEM, AND NON-TRANSITORY COMPUTER READABLE MEDIUM STORING LAYOUT PROGRAM OF SEMICODUCTOR INTEGRATED CIRCUIT
摘要 A layout method of a semiconductor integrated circuit according to the present invention includes selecting M (M is an integer of two or larger and N or smaller) pieces of sequential circuits from N (N is an integer of three or larger) pieces of sequential circuits mounted on the semiconductor integrated circuit, a clock being distributed to the N pieces of sequential circuits from the same clock route; and replacing the M pieces of sequential circuits that are selected with one multi-data input/output sequential circuit including M pieces of input terminals and output terminals and one clock terminal that receives the clock distributed from the clock route.
申请公布号 US2011283248(A1) 申请公布日期 2011.11.17
申请号 US201113099658 申请日期 2011.05.03
申请人 IRIE KAZUYUKI;RENESAS ELECTRONICS CORPORATION 发明人 IRIE KAZUYUKI
分类号 G06F17/50 主分类号 G06F17/50
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