发明名称 LOGIC DESIGN SUPPORT DEVICE AND SOFTWARE FOR THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To enable composition of parallel signal processing logic on a minimum scale without causing any complicated design work. <P>SOLUTION: A function block to be arranged is mapped to a function having a numerical-type decision function of output signal. A numerical type includes an index which determines whether or not the numerical value includes an error, and also includes a bit width of exponent part which shows a floating decimal point type. The numerical-type decision function decides a type so that an output signal does not include an error which is expected from the numerical type of input signal and is equal to or greater than a constant value. The function converts the function block into a logical description of parallel processing by deciding a type of internal signal line sequentially in accordance with a flow of signal from the numerical type of a previously-given external input signal. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011232963(A) 申请公布日期 2011.11.17
申请号 JP20100102775 申请日期 2010.04.27
申请人 SIGNAL PROCESS LOGIC INC 发明人 SEO YUZO
分类号 G06F17/50 主分类号 G06F17/50
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