发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device having a vertical chain structure in which a plurality of phase change memories are laminated on a semiconductor substrate, which reduces the difference in rewriting current between an upper memory cell and a lower memory cell. <P>SOLUTION: A memory cell array MA has a vertical chain structure in which four phase change memories are laminated in a direction perpendicular to a principal surface of a semiconductor substrate. In the structure, each of the thickness of an interlayer insulation film 11 lying between a first layer of the memory cells and an underlying diode PD and the thickness of an interlayer insulation film 15 lying between a fourth layer of the memory cells and an overlying bit line BL is greater than each thickness of three interlayer insulation films 12, 13 and 14 lying between the four memory cells. Accordingly, since the amount dissipated into the environment of Joule heat generated inside a phase change material layer 7 becomes equivalent among the four memory cells, the difference in rewriting current between the memory cells is reduced. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011233831(A) 申请公布日期 2011.11.17
申请号 JP20100105371 申请日期 2010.04.30
申请人 HITACHI LTD 发明人 MORIKAWA TAKAHIRO;HANZAWA SATORU;SASAKO YOSHITAKA;MINEMURA HIROYUKI;SHINTANI TOSHIMICHI
分类号 H01L27/105;H01L45/00 主分类号 H01L27/105
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