发明名称 METHOD FOR FORMING A HIGH-K GATE STACK WITH REDUCED EFFECTIVE OXIDE THICKNESS
摘要 A method is provided for forming a high-k gate stack with a reduced effective oxide thickness (EOT) for a semiconductor device. The method includes providing a silicon-containing substrate, forming an interface layer on the silicon-containing substrate, where the interface layer has a first equivalent oxide thickness, depositing a first high-k film on the interface layer, and heat-treating the first high-k film and the interface layer at a temperature that forms a modified interface layer, where the modified interface layer has a second equivalent oxide thickness that is equal to or lower than the first equivalent oxide thickness. The method further includes depositing a second high-k film on the modified interface layer. According to one embodiment, the first high-k film includes lanthanum oxide and the second high-k film includes hafnium silicate.
申请公布号 KR20110123809(A) 申请公布日期 2011.11.15
申请号 KR20117024635 申请日期 2010.03.25
申请人 TOKYO ELECTRON LIMITED 发明人 CLARK ROBERT D.
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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