发明名称 Read-Only Memory (ROM) Bitcell, Array, and Architecture
摘要 Embodiments provide improved memory bitcells, memory arrays, and memory architectures. In an embodiment, a memory cell comprises a transistor having drain, source, and gate terminals; and a plurality of program nodes, with each of the program nodes charged to a pre-determined voltage and coupled to a respective one of a plurality of bit lines.
申请公布号 US2011273919(A1) 申请公布日期 2011.11.10
申请号 US20100970416 申请日期 2010.12.16
申请人 BROADCOM CORPORATION 发明人 BUER MYRON;SUN DECHANG;JACOBSON DUANE;KNEBELSBERGER DAVID WILLIAM;LECLAIR KEVIN;LECLAIR JAN
分类号 G11C17/08 主分类号 G11C17/08
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