发明名称 |
Planar split-gate high-performance MOSFET structure and manufacturing method |
摘要 |
This invention discloses an improved semiconductor power device includes a plurality of power transistor cells wherein each cell further includes a planar gate padded by a gate oxide layer disposed on top of a drift layer constituting an upper layer of a semiconductor substrate wherein the planar gate further constituting a split gate including a gap opened in a gate layer whereby the a total surface area of the gate is reduced. The transistor cell further includes a JFET (junction field effect transistor) diffusion region disposed in the drift layer below the gap of the gate layer wherein the JFET diffusion region having a higher dopant concentration than the drift region for reducing a channel resistance of the semiconductor power device. The transistor cell further includes a shallow surface doped regions disposed near a top surface of the drift layer under the gate adjacent to the JFET diffusion region wherein the shallow surface doped region having a dopant concentration lower than the JFET diffusion region and higher than the drift layer.
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申请公布号 |
US8053298(B2) |
申请公布日期 |
2011.11.08 |
申请号 |
US20090381813 |
申请日期 |
2009.03.16 |
申请人 |
ALPHA & OMEGA SEMICONDUCTOR LTD. |
发明人 |
BHALLA ANUP;HEBERT FRANCOIS;NG DANIEL S. |
分类号 |
H01L21/337 |
主分类号 |
H01L21/337 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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