发明名称 SEMICONDUCTOR DEVICE WITH REDUCED METAL LAYER STRESS
摘要 The present invention provides a metallization scheme, a method for manufacturing the metallization scheme, and an integrated circuit including the metallization scheme. In one aspect, the metallization scheme ( 300 ) includes a protective layer ( 320 ) located over a substrate ( 310 ), and a conductive layer ( 330 ) located over the protective layer ( 320 ). The metallization scheme ( 300 ) further includes a stress-reducing low-modulus material ( 340 ) located between the protective layer ( 320 ) and the conductive layer ( 330 ).
申请公布号 EP1883960(A4) 申请公布日期 2011.10.26
申请号 EP20060752301 申请日期 2006.05.04
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 TEST, HOWARD
分类号 H01L23/12;H01L23/00;H01L23/053;H01L23/31;H01L23/48;H01L23/52;H01L29/40 主分类号 H01L23/12
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