发明名称 Multi-stage parallel data transfer
摘要 Apparatus and associated method for transferring data to memory, such as resistive sense memory (RSM). In accordance with some embodiments, input data comprising a sequence of logical states are transferred to a block of memory by concurrently writing a first logical state from the sequence to each of a first plurality of unit cells during a first write step, and concurrently writing a second logical state from the sequence to each of a second non-overlapping plurality of unit cells during a second write step.
申请公布号 US8045412(B2) 申请公布日期 2011.10.25
申请号 US20090487165 申请日期 2009.06.18
申请人 SEAGATE TECHNOLOGY LLC 发明人 LU YONG;LIU HARRY HONGYUE;LI HAI;CARTER ANDREW JOHN;REED DANIEL
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项
地址