发明名称 PLL CHARGE PUMP WITH REDUCED COUPLING TO BIAS NODES
摘要 A charge pump includes an UP current mirror and a DN current mirror. The UP current mirror is controlled by an input UP signal and supplies charge onto an output node. The DN current mirror is controlled by an input DN signal and draws charge from the output node. The input UP and DN signals may be received from a phase detector in a Phase-Locked Loop (PLL). To prevent disturbances on bias nodes of the UP and DN current mirrors that otherwise might occur, replica circuits of portions of the UP and DN current mirrors are provided. Each replica circuit is coupled to a bias node of a corresponding current mirror, but is controlled by an input signal of opposite polarity to the input signal that controls the current mirror so that the replica circuit creates disturbances that tend to counteract disturbances created by switching of the current mirror.
申请公布号 US2011254615(A1) 申请公布日期 2011.10.20
申请号 US20100763418 申请日期 2010.04.20
申请人 QUALCOMM INCORPORATED 发明人 RAGHUNATHAN ASHWIN;WADHWA SAMEER;PEDRALI-NOY MARZIO
分类号 G05F1/10 主分类号 G05F1/10
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