发明名称 PLL circuit with VCO gain control
摘要 A PLL circuit includes first and second charge pump circuits controlling an output voltage according to an output signal of a phase comparator, a first filter filtering out predetermined frequency component included in a signal generated according to current output from the first charge pump circuit, and outputting the signal as a first voltage signal, a second filter inputting a current output from the second charge pump circuit and outputting a predetermined constant voltage as a second voltage signal, a voltage control unit outputting a third voltage signal according to a comparison result between the first voltage signal output from the first filter and a reference voltage signal, and a voltage controlled oscillator that has a first low gain property, a second low gain property, and a high gain property, and is controlled by the first to third voltage signals to generate an oscillating frequency.
申请公布号 US8040191(B2) 申请公布日期 2011.10.18
申请号 US20100751395 申请日期 2010.03.31
申请人 RENESAS ELECTRONICS CORPORATION 发明人 HIRAI YOSHITAKA
分类号 H03L7/00 主分类号 H03L7/00
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