发明名称 Reduced defect semiconductor-on-insulator hetero-structures
摘要 A semiconductor-on-insulator hetero-structure and a method for fabricating the semiconductor -on-insulator hetero-structure include a crystalline substrate and a dielectric layer located thereupon having an aperture that exposes the crystalline substrate. The semiconductor-on -insulator hetero-structure and the method for fabricating the semiconductor-on-insulator hetero-structure also include a semiconductor layer of composition different than the crystalline substrate located within the aperture and upon the dielectric layer. A portion of the semiconductor layer located aligned over the aperture includes a defect. A portion of the semiconductor layer located aligned over the dielectric layer does not include a defect. Upon removing the portion of the semiconductor layer located aligned over the aperture a reduced defect semiconductor-on-insulator hetero-structure is formed.
申请公布号 US8039371(B2) 申请公布日期 2011.10.18
申请号 US20090496006 申请日期 2009.07.01
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BEDELL STEPHEN W.;KIM JEEHWAN;REZNICEK ALEXANDER;SADANA DEVENDRA K.
分类号 H01L21/20;H01L21/36 主分类号 H01L21/20
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