摘要 |
<p>A method of manufacturing a transistor comprising: providing a substrate 1 and a region of electrically conductive material 2 thereon; forming at least one layer of resist material 3 over said region 2; forming a depression 4 in a surface of the resist material 3, said depression 4 extending over a first portion 21 of said region 2, said first portion 21 separating a second portion 22 from a third portion 23 of the region; removing resist material located under said depression 4 so as to form a window 9, exposing said first portion 21 of said region 2; removing said first portion 21 to expose a portion of substrate 1 separating the second portion 22 from the third portion 23; depositing semiconductive material to form a semiconductor layer 51, at least inside the window 9 connecting the second portion 22 to the third portion 23; depositing dielectric material to form a dielectric layer 61 over said semiconductor layer 51; depositing electrically conductive material to form an electrically conductive layer 71 over said dielectric layer 61; and removing resist material 3 at least from around said window 9 so as to expose the second and third portions, whereby said second and third portions provide a source terminal and a drain terminal respectively and the electrically conductive layer 71 forms a gate terminal. Also disclosed is a method as above, where the electrically conductive region 2 is provided as two separate source and drain regions on the substrate, prior to the forming of the resist layer 3.</p> |