发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, ROUTE DETERMINATION CIRCUIT AND ROUTE DETERMINATION METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce the number of times of packet communication between routers without increasing the number of FIFOs in routing in NoC. <P>SOLUTION: This route determination circuit determines a route between IP cores in the Noc, and includes: a route candidate calculation part which calculates a plurality of route candidates from a first IP core to a second IP core at a destination on the basis of destination information outputted from the first IP core which transmits a request; and a route selection part which selects a route candidate with the lowest degree of congestion among the plurality of route candidates as a route on the basis of degrees of congestion of routers on the respective route candidates of the plurality of route candidates. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011193258(A) 申请公布日期 2011.09.29
申请号 JP20100057938 申请日期 2010.03.15
申请人 RENESAS ELECTRONICS CORP 发明人 TOKUOKA MASAHIRO
分类号 H04L12/701;H04L12/729;H04L12/733 主分类号 H04L12/701
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