发明名称 TIMING ANALYSIS DEVICE OF SEMICONDUCTOR INTEGRATED CIRCUIT, PROGRAM FOR THE SAME, AND COMPUTER-READABLE RECORDING MEDIUM WITH THE SAME RECORDED
摘要 PROBLEM TO BE SOLVED: To efficiently identify a node where timing is off after a circuit is changed. SOLUTION: The timing analysis device is provided with: a reference circuit data reading means 12 for reading a net list and timing information of a reference circuit used as a reference of comparison from the libraries 4 and 6 of the reference circuit; a revised-version circuit data reading means 14 to read the net list and timing information of the revised-version circuit which is at least partially different from the reference circuit, from libraries 8 and 10 of the revised-version circuit; a timing restriction reading means 16 for reading timing restriction common to both circuits; analysis means 18 and 20 for analyzing the timing of each circuit on the basis of the read timing restriction; and means 32 and 34 which output a reference circuit timing report showing analysis result data obtained by the analysis means for the reference circuit and a revised-version circuit timing report showing analysis result data obtained by the analysis means for the revised-version circuit, side by side. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011192183(A) 申请公布日期 2011.09.29
申请号 JP20100059660 申请日期 2010.03.16
申请人 RICOH CO LTD 发明人 KUMANO YOSHINORI
分类号 G06F17/50 主分类号 G06F17/50
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