发明名称 System and method for improved placement in custom VLSI circuit design with schematic-driven placement
摘要 A method for generating an electronic circuit layout with placed circuit elements receives a user provided schematic, the user provided schematic comprising a plurality of circuit elements, each circuit element comprising general parameters. The method associates a plurality of first placement parameters with each of the plurality of circuit elements, wherein the first placement parameters comprise a cell horizontal position, a cell vertical stacking position, and a cell vertical adjacent spacing. The method retrieves, from a design library, design parameters associated with at least one of the plurality of circuit elements. The method assigns first absolute placement coordinates for each of the plurality of circuit elements based on the first placement parameters and the design parameters. The method defines and performs an adjustment operation on the placement parameters of a selected subset of circuit elements, generating adjusted placement parameters. The method assigns second absolute placement coordinates based on the first placement parameters, the design parameters, and the adjusted placement parameters and generates an electronic circuit layout with placed circuit elements based on the second absolute placement coordinates.
申请公布号 US8028265(B2) 申请公布日期 2011.09.27
申请号 US20080183898 申请日期 2008.07.31
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 RAMSOUR WILLIAM D.;WARD SAMUEL I.;ZHOU JUN
分类号 G06F17/50;G06F15/04 主分类号 G06F17/50
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