发明名称 POWER-UP CIRCUIT
摘要 A power-up circuit comprises an external supply voltage potential detector, a first internal supply voltage potential detector, a second internal supply voltage potential detector, and a logic circuit. The external supply voltage potential detector is configured to detect a supply voltage that is external to the memory device and to generate a first detection signal indicating whether a voltage potential of the external supply voltage reaches a first predetermined value. The first internal supply voltage potential detector is configured to detect a first internal supply voltage that is internal to the memory device and to generate a second detection signal indicating whether a voltage potential of the first internal supply voltage reaches a second predetermined value. The second internal supply voltage potential detector is configured to detect a second internal supply voltage that is internal to the memory device and to receive the first detection signal and an output voltage of the first internal supply voltage potential detector for generating a third detection signal indicating whether the voltage potentials of the external supply voltage and the first and second internal supply voltages reach the first, second, and third predetermined values respectively. The logic circuit is configured to receive the third detection signal and to generate a power-up signal.
申请公布号 US2011228623(A1) 申请公布日期 2011.09.22
申请号 US20100728508 申请日期 2010.03.22
申请人 ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. 发明人 CHEN CHUNG ZEN
分类号 G11C5/14 主分类号 G11C5/14
代理机构 代理人
主权项
地址