| 摘要 |
In the present invention, unlike a conventional circuit, discrimination is not made by integrating a logical code that includes “0” and “1” to some extent and produced from a random code, but repetition of an identical pattern of a well-known preamble signal added to a head portion of a signal is discriminated when a bit-rate of the signal is changed. More specifically, the repetition of the identical pattern is converted into a consecutive identical signal to generate the consecutive identical signal (having a length of tens bits to thousands bits). Although the consecutive identical signal is longer than a same-code continuation length included in the signal, and is shorter than a time constant necessary to the conventional circuit by about one to three digits. Therefore, an integration time can be shortened to the same degree as the generated consecutive identical signal length, and the bit-rate can be discriminated at high speed within a preamble signal receiving time.
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