| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce the number of processes and manufacturing costs, and to reduce a risk of physical damage to a compound semiconductor in manufacture and deterioration in electrical characteristics. <P>SOLUTION: After an isolation trench 21 is formed in a stripe shape on a compound semiconductor layer 1 formed on a sapphire substrate 20, a plated layer 6 is formed on an entire surface of the compound semiconductor layer 1, so that the plated layer 6 can be used as a support substrate after releasing the sapphire substrate 20. Thus, it becomes unnecessary to thermally compress another support substrate onto the compound semiconductor 1 and inconveniences do not occur, where the support substrate is warped by a thermal effect in thermocompression bonding, stress is applied to the support substrate by the warpage, and, for example, the support substrate is cracked. Also, the plated layer 6 can be formed by an electrolytic plating method, thus reducing the number of manufacturing processes as compared with thermocompression bonding and reducing manufacturing costs. <P>COPYRIGHT: (C)2011,JPO&INPIT |
