| 发明名称 |
Circuit splitting in analysis of circuits at transistor level |
| 摘要 |
Operating splitting methods for splitting a circuit into two sub circuits and analyzing the two sub circuits with improved computation efficiency and processing speed.
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| 申请公布号 |
US8020122(B2) |
申请公布日期 |
2011.09.13 |
| 申请号 |
US20050916925 |
申请日期 |
2005.06.07 |
| 申请人 |
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA |
发明人 |
CHENG CHUNG-KUAN;ZHU ZHENGYONG;SHI RUI |
| 分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
| 代理机构 |
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