发明名称 HIGH INTEGRITY DATA BUS FAULT DETECTION USING MULTIPLE SIGNAL COMPONENTS
摘要 Methods and apparatus are provided for verifying the integrity of a signal transmitted across a multiple rail data bus. The method and apparatus provide for independently processing a signal by a first processor and a second processor, the first and second processors being connected in parallel thereby generating a first processed signal and a second processed signal. Each of the processed signals is split into a first component sequence and a second component sequence, the first component sequences being different from the second component sequences. It is then determined that the first component sequences are not identical and that the second component sequences are not identical. If either of the first component sequences is not identical, or if either of the second component sequences is not identical, then an error signal is transmitted to a receiving device via a first or second rail of the bus.
申请公布号 US2011214043(A1) 申请公布日期 2011.09.01
申请号 US20100713712 申请日期 2010.02.26
申请人 HONEYWELL INTERNATIONAL INC. 发明人 WILT NICHOLAS;GRAY SCOTT;FLETCHER MITCH
分类号 G06F11/07 主分类号 G06F11/07
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