发明名称 |
Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers |
摘要 |
A technique to monitor software thread performance and update software that issues or uses the thread(s) to reduce performance-inhibiting events. At least one embodiment of the invention uses hardware and/or software timers or counters to monitor various events associated with executing user-level threads and report these events back to a user-level software program, which can use the information to avoid or at least reduce performance-inhibiting events associated with the user-level threads.
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申请公布号 |
US8010969(B2) |
申请公布日期 |
2011.08.30 |
申请号 |
US20050151809 |
申请日期 |
2005.06.13 |
申请人 |
INTEL CORPORATION |
发明人 |
HANKINS RICHARD A.;CHINYA GAUTHAM N.;WANG HONG;KAUSHIK SHIVNANDAN D.;BIGBEE BRYANT E.;SHEN JOHN P.;DIEP TRUNG A.;ZOU XIANG;PATEL BAIJU V.;PETERSEN PAUL M.;SHAH SANJIV M.;RAKVIC RYAN N.;SETHI PRASHANT |
分类号 |
G06F3/00;G06F7/38;G06F9/46 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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