| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of semiconductor substrate capable of freely setting the size of the alignment mark and preventing the generation of problems such as a resist coating spot and a residual resist during a device manufacturing process, without having to install a dedicated process for forming alignment marks. <P>SOLUTION: A substrate 19 is prepared, trenches 14, 16 in which the trench width of an alignment mark region 15 is wider than that of a PN column region 13, are simultaneously formed on the alignment mark region 15 and the PN column region 13. Subsequently, a single crystal semiconductor layer 21 is completely buried in the trench 14 of the PN column region 13, while a part of the semiconductor layer 21 is formed so that a gap is formed in the trench 16 of the alignment mark region 15. Then, the trench 16 is closed by the single crystal semiconductor layer 21 so that a cavity 22 is formed in the trench 16 of the alignment mark region 15. <P>COPYRIGHT: (C)2011,JPO&INPIT |
